The invention relates to semiconductor devices, including microwave and millimeter wave integrated circuits and fabrication methods therefore.
The present invention provides a new approach to manufacture of advanced and cost effective microwave and millimeter wave monolithic integrated circuits (MMICs). The invention adapts partially opaque ion implantation masks to selectively control implantation energy for defining active channel layers in a substrate.
In a particularly desirable aspect, the invention enables fabrication of a microwave and millimeter wave integrated circuit chip having both low noise high speed components and power components monolithically integrated on the same substrate.
In another particularly desirable aspect, the invention enables fabrication of microwave and millimeter wave integrated circuits with plural active channel devices monolithically integrated on the same substrate with uniform pinch-off voltage, which significantly enhances yield and hence cost effectiveness. Uniform pinch-off voltage is provided by uniform depth and vertical area of the active channel, which in turn is enabled by masking structure and methodology relying upon ion implantation energy absorption, not chemical etching. The departure from reliance on chemical etching and the necessary variances thereof in depth and uniformity due to varying surface topologies and impurities, significantly enhances repeatability and reliability. The present invention overcomes prior drawbacks and relies on the energy absorption of a partially opaque ion implantation mask layer to provide uniformity in depth of active channels, and hence uniform, repeatable and reliable pinch-off voltage, which in turn significantly enhances yield of a chip having multiple active channel devices.
In a further aspect, the invention eliminates the need for FET gate recessing, resulting in enhancement of rf performance, reliability, yield, uniformity and repeatability.
In a further aspect, the invention enables increased gate to drain separation in a non-recessed FET, enabling higher voltage. The invention also enables reduced source to gate series resistance, due to increased active layer thickness, and thus provides lower noise and higher gain.